[kernel] VSA kernel: one sm_100a / sm_103a image per listed arch; un-gate backward on sm_103a (#1833)
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
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co-authored by
Claude Fable 5.1
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a943220c11
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aef4e9b3b1
@@ -1,5 +1,5 @@
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# SPDX-License-Identifier: Apache-2.0
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"""sm_100a (Blackwell) CUDA block-sparse VSA backward.
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"""sm_100a/sm_103a (data-center Blackwell) CUDA block-sparse VSA backward.
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Companion of ``block_sparse_attn_sm100a`` (the forward): consumes the forward's ``lse`` in the
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Triton "M format" (``max(qk * sm_scale * log2e) + log2(l)``, ``[B, H, S]`` fp32) unchanged and
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@@ -23,7 +23,7 @@ except ImportError: # pragma: no cover - extension not built
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_BWD = None
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_HAS_VSA_BWD_SM100A = False
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_SM100 = (10, 0)
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_SUPPORTED_COMPUTE_CAPABILITIES = {(10, 0), (10, 3)}
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HEAD_DIM = 128
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BLOCK = 64
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# Must match the -DVSA_BHSD the extension was compiled with (FastVideo builds with true).
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@@ -58,7 +58,7 @@ def is_supported(q: torch.Tensor, variable_block_sizes: torch.Tensor) -> bool:
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"""
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if not _HAS_VSA_BWD_SM100A or not q.is_cuda:
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return False
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if torch.cuda.get_device_capability(q.device) != _SM100:
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if torch.cuda.get_device_capability(q.device) not in _SUPPORTED_COMPUTE_CAPABILITIES:
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return False
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if q.dtype != torch.bfloat16 or q.dim() != 4 or q.shape[-1] != HEAD_DIM:
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return False
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