Aryan Kumar and Aryan Kumar
fa2d1324c6
[feat]: FastH3 Omni (Ref2VA) on Apple Silicon MLX ( #2000 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-10-21 12:01:54 -07:00
376e445f0e
[feat]: FastH3 OmniRef inference on consumer devices (RTX 5090 / PRO 6000 / DGX Spark / 4090) ( #1980 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-19 14:57:36 -07:00
lpc0220 and root
d4ed61cc7c
[refactor] VSA: rename the sm100a block-sparse kernel to ptx_blackwell ( #1956 )
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Co-authored-by: root <root@ptyche0124.ptyche.clusters.nvidia.com >
2026-10-17 21:10:19 -07:00
Aryan Kumar and Aryan Kumar
6212e7262e
[docs] Migrate documentation and cookbook to Blume ( #1969 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-10-16 16:09:04 -07:00
f82c190cbb
[kernel] Build + allow attn_qat_infer FP4 attention on sm_121a (DGX Spark) ( #1598 )
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Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 04:09:39 -07:00
274b922d39
[misc]: surface GenerationResult.peak_memory_mb in the MiniMax H3 examples ( #1785 )
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Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 01:29:56 -07:00
02a027c49f
[feat]: FastH3 on DGX Spark and Apple Silicon ( #1920 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
Co-authored-by: Aryan Kumar <aryank@Aryans-Mac-Studio.local >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-06 12:17:11 -07:00
Aryan Kumar and Aryan Kumar
7f03e03dc6
[docs]: FastH3 V2 cookbook serving and MLX install guide ( #1884 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-29 13:03:18 -07:00
Kyle Hu
81f3fec7fd
[bugfix]: workers killed by a signal now log the reason ( #1725 )
2026-09-24 17:06:55 -07:00
Aryan Kumar
361f919c88
[feat]: add a narrow FastH3 8-step MLX ladder
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Keep the four-step uniform AdaLN cache, and use explicit DMD rungs only when the snapshot declares its own scheduler shifts.
2026-09-23 11:06:55 -07:00
Lele
316f3876c2
[bugfix]: allow MiniMax H3 frame padding at the 15-second limit
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Accept the causal-VAE-aligned 362-frame bucket (15.083 s) for 15-second H3 requests.
- Hoist MINIMAX_H3_MIN/MAX_ALIGNED_FRAMES next to align_num_frames and reuse them in the CUDA stage, the MLX runtime, and the LoRA example so the bound is consistent across entry points.
- State the accepted frame range in the error messages.
- Cover seconds="15" -> 362 at OpenAI admission and the MLX resolve_geometry bound.
- Update the Spark/openai cookbook frame caps from 345 to 362.
Known gaps: no GPU-lane coverage for the 362 bucket (SSIM runs 124 frames; the golden gate is a fixed-geometry fingerprint), and explicit num_frames=360 still hits the pre-existing grid gate.
2026-09-14 16:54:41 -07:00
Aryan Kumar and Aryan Kumar
0bd19a976b
[docs]: add one-Spark FastH3 cookbook runtime with a device-count row ( #1811 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-02 10:05:59 -07:00
aaef49bfc6
[feat]: run FastH3 across two DGX Sparks with Ray sequence parallel ( #1803 )
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Co-authored-by: Kyle <shh075@ucsd.edu >
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com >
Co-authored-by: Satyam Srivastava <srivastavasatyam53@gmail.com >
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-01 01:37:23 -07:00
Aryan Kumar and Aryan Kumar
cf6a00b9be
[feat]: add opt-in CUDA TAEH3 preview decode for FastH3 ( #1795 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-31 23:34:56 -07:00
Aryan Kumar and Aryan Kumar
f82d8be4bf
[perf] Sequential MiniMax H3 start with GPU-direct DiT load ( #1793 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-31 04:20:21 -07:00
Suhaan Khurana
29ff16ec96
[feat] Add MiniMax H3 MLX spatial fast mode ( #1789 )
2026-08-30 17:47:02 -07:00
a4d9a75e2c
[perf] Add MiniMax H3 MLX VSA and SIMD attention ( #1776 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
2026-08-30 13:44:54 -07:00
ac48bb3cd1
[feat] Add MiniMax H3 MLX T2VA inference ( #1770 )
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Co-authored-by: Aryan Kumar <aryank@Aryans-Mac-Studio.local >
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
Co-authored-by: CodeRabbit <noreply@coderabbit.ai >
2026-08-28 12:54:33 -07:00
KyleNeverGivesUp
e9bbaca07d
[perf] Disable every offload path on unified memory, unblocking MiniMax H3 generation on one GB10 ( #1715 )
2026-08-26 15:32:56 -07:00
Aryan Kumar and Aryan Kumar
6388db815b
[bugfix] FastMetal-QAD MLX support: refuse CUDA QAD trees, use packed mlx_dit config, stream loads ( #1736 ) ( #1758 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-25 14:51:40 -07:00
Aryan Kumar and Aryan Kumar
8537dcd6de
[feat]: Apple Silicon MLX runtime — INT8 Wan2.1 and Wan2.2 inference ( #1638 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-18 15:08:00 -07:00
Raghav K and SolitaryThinker
a2bfc7cdb2
[docs] DGX Spark (GB10) performance & tuning guide + reproduction examples ( #1631 )
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Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
2026-08-06 14:36:38 -07:00
William Lin
69349dd2aa
[docs]: unify community links on the README Slack invite ( #1643 )
2026-07-25 17:26:58 -07:00
William Lin
b36d0ef085
[infra] Add DGX Spark and multi-architecture CUDA support ( #1447 )
2026-07-03 13:41:43 -07:00
William Lin
140bd1a6cf
[misc]: standardize install instructions on uv pip install ( #1279 )
2026-05-02 12:45:50 -07:00
Junda (David) Su
e315657066
[docs] [kernel] Migrate to uv ( #1127 )
2026-02-25 14:13:50 -08:00
Qi Jia
5285116e73
[docs]: fix various broken links across the documentation ( #979 )
2026-01-01 20:02:39 -06:00
Mihir Jagtap
8f5712629f
[docs] port to mkdocs ( #855 )
2025-11-04 14:31:56 -08:00
