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aaef49bfc6
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[feat]: run FastH3 across two DGX Sparks with Ray sequence parallel (#1803)
Co-authored-by: Kyle <shh075@ucsd.edu>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Satyam Srivastava <srivastavasatyam53@gmail.com>
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-09-01 01:37:23 -07:00 |
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Aryan KumarandAryan Kumar
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cf6a00b9be
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[feat]: add opt-in CUDA TAEH3 preview decode for FastH3 (#1795)
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-08-31 23:34:56 -07:00 |
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Aryan KumarandAryan Kumar
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f82d8be4bf
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[perf] Sequential MiniMax H3 start with GPU-direct DiT load (#1793)
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-08-31 04:20:21 -07:00 |
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KyleNeverGivesUp
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e9bbaca07d
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[perf] Disable every offload path on unified memory, unblocking MiniMax H3 generation on one GB10 (#1715)
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2026-08-26 15:32:56 -07:00 |
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Raghav KandSolitaryThinker
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a2bfc7cdb2
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[docs] DGX Spark (GB10) performance & tuning guide + reproduction examples (#1631)
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
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2026-08-06 14:36:38 -07:00 |
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