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aaef49bfc6
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[feat]: run FastH3 across two DGX Sparks with Ray sequence parallel (#1803)
Co-authored-by: Kyle <shh075@ucsd.edu>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Satyam Srivastava <srivastavasatyam53@gmail.com>
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-09-01 01:37:23 -07:00 |
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Aryan KumarandAryan Kumar
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cf6a00b9be
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[feat]: add opt-in CUDA TAEH3 preview decode for FastH3 (#1795)
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-08-31 23:34:56 -07:00 |
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Aryan KumarandAryan Kumar
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f82d8be4bf
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[perf] Sequential MiniMax H3 start with GPU-direct DiT load (#1793)
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
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2026-08-31 04:20:21 -07:00 |
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William Linandshaoxiongduan
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a534ba20a0
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[feat] Add MiniMax H3 LoRA inference and preview launchers (#1771)
Co-authored-by: shaoxiongduan <shaoxiongduan@gmail.com>
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2026-08-27 14:43:39 -07:00 |
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William Lin
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a837fe841a
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[docs] Update FastH3 README (#1749)
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2026-08-23 05:05:58 -07:00 |
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William Lin
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f9e3680f11
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[perf] Align FastH3 optimized inference profile (#1748)
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2026-08-23 02:01:03 -07:00 |
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William Lin
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13213395b4
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[perf] Parallelize MiniMax-H3 VAE over sequence ranks (#1744)
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2026-08-22 18:05:31 -07:00 |
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William Lin
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d3cff517cd
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[perf] Add opt-in regional fullgraph compile for DiT inference (#1741)
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2026-08-22 12:14:39 -07:00 |
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William Lin
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6d6a10be7a
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[feat] FastVideo-Minimax-FastH3-Preview few-step example + 64-token-tile VSA-H3 inference path (#1731)
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2026-08-21 12:40:09 -05:00 |
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