Raghav K and Claude Opus 5.5
f8864246db
[bugfix] Map merged-LoRA export keys back to HF names when LoRA was enabled after loading ( #2070 )
...
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-11-05 15:40:06 +00:00
Aryan Kumar and Aryan Kumar
fcec554456
[feat]: shared FastH3 NVFP4 FP4-attention QAD recipe (OmniRef + V2 T2AV) ( #1989 )
...
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-11-03 00:54:28 -08:00
William Lin
cdda1b7535
[feat] Add H3 PDD/DMPDD training and packed Ref2VA preprocessing ( #1984 )
2026-10-20 11:15:57 -07:00
3658b120da
[bugfix] Fix tests that fail on main: FastH3 Trim Spark audio, test isolation ( #1957 )
...
Co-authored-by: root <root@ptyche0124.ptyche.clusters.nvidia.com >
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
Co-authored-by: root <root@ptyche0040.ptyche.clusters.nvidia.com >
2026-10-18 16:07:59 -07:00
lpc0220 and root
d4ed61cc7c
[refactor] VSA: rename the sm100a block-sparse kernel to ptx_blackwell ( #1956 )
...
Co-authored-by: root <root@ptyche0124.ptyche.clusters.nvidia.com >
2026-10-17 21:10:19 -07:00
William Lin
9f59519959
[misc] Remove DreamX World, HunyuanGameCraft, GLM-Image, LongCat, TurboDiffusion, and Z-Image ( #1926 )
2026-10-14 23:16:32 -07:00
Zhang Peiyuan and Claude Opus 5.5
c520878fd2
[perf]: QAT/QAD add safe regional compile for modular training ( #1718 )
...
Adds opt-in regional torch.compile to the YAML-driven modular Wan trainer (training.model.enable_torch_compile / torch_compile_kwargs) with FA4 and Wan modulation forward/backward as opaque custom ops, compiled repeated DiT blocks after FSDP setup, and activation checkpointing applied before FSDP for trainable Wan transformers.
Merged with main's #1716 (WanModel resolves the checkpointing type in __init__; the PR's pre-FSDP wrap uses it and the post-load wrap is gone) and #1757 (pre_fsdp_model_transform runs before this PR's pre_fsdp_transform). Maintainer review (Swarm order #776 ): AdaLN skip names are canonicalized through checkpoint-wrapper prefixes, test_inference_regional_compile.py joins the unit lane, the Wan modulation custom-op test moved to the transformer lane, regional_compile is classified in the schema inventory, and a 1/2-GPU training smoke covers fully_shard(CheckpointWrapper) in eager and regional-compile modes. Validated on GB200: the FA4 CuTe forward/backward parity and fullgraph-backward tests and all four smoke cases pass.
Also exempts MMAudio recipes, whose student builds its pipeline config at init, from the fine-tuning recipe construction check that #1648 left failing on main.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 05:24:24 -07:00
3467f8befb
[feat] Add end-to-end MMAudio V2A training, inference, and evaluation ( #1648 )
...
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 04:25:00 -07:00
d5287f8352
[feat]: add MiniMax H3 Ref2VA and LoRA training support ( #1757 )
...
Co-authored-by: William Lin <8941107+SolitaryThinker@users.noreply.github.com >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 03:21:45 -07:00
6102fac00d
[bugfix]: fix modular ops activation checkpoint recomputation ( #1716 )
...
Co-authored-by: William Lin <8941107+SolitaryThinker@users.noreply.github.com >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 02:41:12 -07:00
a4e7322ba6
[bugfix]: synchronize post-FSDP LoRA replicas ( #1666 )
...
Co-authored-by: Suckl <Suckl@users.noreply.github.com >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 01:53:30 -07:00
abe98e87f5
[feat] Add phase-aware modular training performance metrics ( #1826 )
...
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-10-07 01:30:11 -07:00
William Lin
9028953625
[misc] yapf pass under CI's interpreter (3.12) + pin hook language_version ( #1702 )
2026-08-08 22:24:17 -07:00
Junda Su
c3567eb468
[feat] add Minimax H3 sft pipeline ( #1688 )
2026-08-07 16:12:04 -07:00
William Lin
7b094c945b
[refactor]: resolve attention backend once per component at load time ( #1657 )
2026-08-02 15:07:42 -07:00
William Lin
422585d08f
[misc]: add LTX-2.3 fine-tuning example recipes ( #1651 )
2026-07-27 18:42:44 -07:00
William Lin
bf18371afe
[feat] Enable LTX-2 NVFP4 linear and attention QAT fine-tuning ( #1626 )
2026-07-26 02:19:34 -07:00
9709b7513b
[feat] Port NVFP4 QAT/QAD to modular train framework ( #1619 )
...
Co-authored-by: Peiyuan Zhang <email>
Co-authored-by: Peiyuan <a>
2026-07-18 15:01:09 -07:00
Mingjia Huo and Claude Fable 5
4c08ffce49
[feat] World model training using third person games ( #1443 )
...
Co-authored-by: Claude Fable 5 <noreply@anthropic.com >
2026-07-10 05:09:07 +00:00
alexzms
4c915b7742
[ci] add CPU unit tests for train checkpoint utilities in fastvideo.train ( #1265 )
2026-04-29 18:55:39 +00:00
alexzms
ea25441ef0
[ci] add CPU unit tests for fastvideo.train load_run_config ( #1264 )
2026-04-28 01:06:18 +00:00
