Wenxuan Tan
7f654e3332
[misc] Polish V1 training code ( #469 )
2025-06-03 22:02:03 -05:00
Yongqi Chen and Peiyuan Zhang
1e08893546
Added multi-GPU support for Hunyuan STA ( #211 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2025-02-21 14:16:28 -08:00
Yongqi Chen and Peiyuan Zhang
e768b5ec5b
Update readme ( #202 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2025-02-20 13:16:25 -08:00
rlsu9
5ae5b247b3
[FIX] fix isort format ( #203 )
2025-02-20 12:20:20 -08:00
ead6c62be4
[Feat] Add STA for StepVideo ( #200 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
Co-authored-by: BrianChen1129 <yongqich@umich.edu >
2025-02-20 11:33:58 -08:00
Yongqi Chen and Peiyuan Zhang
6805eaa06c
[bug]: fix ori hunyuan inference issue ( #199 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2025-02-19 14:18:15 -08:00
rlsu9
a3ec969397
[feat]: fix readme demo and add video to readme ( #191 )
2025-02-18 17:46:32 -05:00
Yongqi Chen and Peiyuan Zhang
76a12cc8a1
Infer sta tea with torch.compile ( #190 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2025-02-18 11:29:36 -08:00
Yongqi Chen and Peiyuan Zhang
9ea39cee57
Add STA and teacache forward ( #184 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2025-02-15 16:22:01 -08:00
Brian Chen
218449c54d
adding hunyuan hf (support lora finetuning); unified hunyuan hf inference with quantization ( #135 )
2025-01-13 19:47:42 -08:00
Yuzhou Nie and “Peiyuan Zhang”
4a1f1e35bb
add parallel for vae decoding ( #134 )
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Co-authored-by: “Peiyuan Zhang” <a1286225768@gmail.com >
2025-01-07 17:14:21 -08:00
rlsu9
0aed1868df
[feat]: Add format auto fixer to main branch ( #124 )
2024-12-31 15:23:17 -08:00
Zhang Peiyuan and rlsu9
88b2583c2c
[feat]:Single 4090 inference for fasthunyuan ( #104 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-25 12:40:16 -08:00
a57122c519
Rlsu lora readme ( #86 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
Co-authored-by: rlsu9 <147024991+rlsu9@users.noreply.github.com >
2024-12-17 11:37:07 -08:00
Zhang Peiyuan and rlsu9
b393570e45
Update README ( #85 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-16 17:06:14 -08:00
Zhang Peiyuan and rlsu9
285635e8c0
Clean up ( #84 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-15 20:33:11 -08:00
Zhang Peiyuan and rlsu9
58cfd71b5e
Cleanup
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-15 17:03:29 -08:00
Zhang Peiyuan and foreverpiano
6ab2263f3a
[Feat] Add HunyuanVideo ( #78 )
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Co-authored-by: foreverpiano <pianoqwz@qq.com >
2024-12-12 14:14:09 -08:00
Zhang Peiyuan
de1e8d868e
Cleanup ( #75 )
2024-12-06 20:56:06 -08:00
Zhang Peiyuan and foreverpiano
8d41d505fe
[cleanup] ( #72 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-12-05 21:02:10 -08:00
Brian Chen
8cfdf58a17
[Feat] HF Lora
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yongqich@umich.edu
2024-12-05 18:50:53 -08:00
Zhang Peiyuan
d417e4c7c4
[Feat] Refactor GAN; State saving & Resume; Experiments script ( #59 )
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typo
add upload command
add
add ema_transform
add ema transformer
remove harcode
ok
ema
remove hardcode
update env
update script; no sp
revert to sp=4, sp bs=2, full shard
add aws efo env
distributed validation
readme
distributed validation
add gupload
linear range; fix uncond; multi guidance validation
add script
2024-11-28 21:09:31 -08:00
Zhang Peiyuan
03187fd83a
[Feat][Debug] linear quadratic distill; HF precision bug ( #56 )
2024-11-27 15:13:20 -08:00
Zhang Peiyuan
8a128ad815
[Fix] Squeeze bug ( #55 )
2024-11-26 13:29:03 -08:00
Zhang Peiyuan
13f665e455
[Feat] PCM Distill; Refactor FM logit to be compatible with all SD3/Flux scheduler. ( #54 )
2024-11-26 12:26:24 -08:00
Zhang Peiyuan and foreverpiano
7106eadffc
[feat]: Add LADD ( #45 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-15 19:28:41 -08:00
Yongqi Chen and Peiyuan Zhang
6d0082c1a9
[Feat] Lora resume ( #48 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-13 01:30:58 -05:00
Zhang Peiyuan and Yongqi Chen
3d9189571a
[feat]: Add lora ( #47 )
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Co-authored-by: Yongqi Chen <144848849+BrianChen1129@users.noreply.github.com >
2024-11-11 13:12:14 -08:00
Zhang Peiyuan
b042e321a1
[Refactor] Switch to FSDP ( #42 )
2024-11-09 15:46:25 -08:00
rlsu9
035ba5f5cf
[feat]: Add vae encoder embedded generator to main ( #30 )
2024-11-06 11:58:15 -08:00
Zhang Peiyuan and foreverpiano
f0bc297260
[Feat] Sequence Parallel ( #31 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-05 08:13:01 -08:00
rlsu9
7413b1dd5f
[feat]: update data preprocess
2024-10-31 00:13:05 +00:00
Peiyuan Zhang
8ec82cbc37
Generate synthetic dataset
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Delete Open Sora Plan Modeling
amend log validation
Change name to fast video
Remove OSP modeling
clean up name changing
remove files
Deleted unnecessary files
commit first
commit first
training
ok
Update generate_synthetic.sh and deepspeed_zero2_config.yaml
14
debug
overfitting ....
debugging ..
Debug successful!
Add zero3
OK
update optimizer
load
small bug
random seed args
sp enable & still has bug
rename
update inference sp code / can run / still has bug / don't output normal mp4
switch to deepspeed dummyoptim
fix some bugs; still output green
SP inference done!
fix typos in readme and latent dataset debug file
2024-10-28 00:44:02 +00:00
Wenxuan Tan