Zhang Peiyuan
0f2bbe71ac
[misc] rename dp_size to hdsp_replicate_dim ( #491 )
2025-06-10 16:36:56 -07:00
eeecho
d5ec468d43
[V0] [Distill] support distill in V0 for wan ( #444 )
2025-06-04 16:20:14 -07:00
Wenxuan Tan
7f654e3332
[misc] Polish V1 training code ( #469 )
2025-06-03 22:02:03 -05:00
applesaucethebun and Brayden Zhong
51956369a5
[Misc] Replace instances of time.time() with time.perf_counter() ( #396 )
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Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca >
2025-05-11 15:56:39 -07:00
ead6c62be4
[Feat] Add STA for StepVideo ( #200 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
Co-authored-by: BrianChen1129 <yongqich@umich.edu >
2025-02-20 11:33:58 -08:00
Brian Chen
218449c54d
adding hunyuan hf (support lora finetuning); unified hunyuan hf inference with quantization ( #135 )
2025-01-13 19:47:42 -08:00
rlsu9
e0e05f97f2
[feat]: Add tests for FastVideo ( #127 )
2025-01-06 12:27:39 -08:00
Zhang Peiyuan
dd75ee8509
[Fix] Save CK, Dataset bug fix ( #125 )
2024-12-31 22:19:10 -08:00
rlsu9
0aed1868df
[feat]: Add format auto fixer to main branch ( #124 )
2024-12-31 15:23:17 -08:00
a57122c519
Rlsu lora readme ( #86 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
Co-authored-by: rlsu9 <147024991+rlsu9@users.noreply.github.com >
2024-12-17 11:37:07 -08:00
Zhang Peiyuan and rlsu9
58cfd71b5e
Cleanup
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-15 17:03:29 -08:00
Hangliang Ding and rlsu9
3bf892b6ab
update release readme ( #81 )
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Co-authored-by: rlsu9 <r3su@ucsd.edu >
2024-12-15 22:24:13 +08:00
Zhang Peiyuan and foreverpiano
6ab2263f3a
[Feat] Add HunyuanVideo ( #78 )
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Co-authored-by: foreverpiano <pianoqwz@qq.com >
2024-12-12 14:14:09 -08:00
Zhang Peiyuan
de1e8d868e
Cleanup ( #75 )
2024-12-06 20:56:06 -08:00
Zhang Peiyuan and foreverpiano
8d41d505fe
[cleanup] ( #72 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-12-05 21:02:10 -08:00
Brian Chen
8cfdf58a17
[Feat] HF Lora
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yongqich@umich.edu
2024-12-05 18:50:53 -08:00
Zhang Peiyuan
cf15594055
[Feat & Debug] fix uncond; multi guidance validaiton; multiphase schedule; linear range ( #64 )
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typo
update
update
typo
[Debug] Typo (#65 )
debug gradient accumulation loss
update gitignore
typo
typo
update scripts
update experiment 10
new script
typo
update
update
update
update
wandb offline and dir
runlong
update
update
update
update
update
update
update
fix finetune code bug
update
update
update
add l2
update
2024-11-30 16:43:24 -08:00
Zhang Peiyuan
d417e4c7c4
[Feat] Refactor GAN; State saving & Resume; Experiments script ( #59 )
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typo
add upload command
add
add ema_transform
add ema transformer
remove harcode
ok
ema
remove hardcode
update env
update script; no sp
revert to sp=4, sp bs=2, full shard
add aws efo env
distributed validation
readme
distributed validation
add gupload
linear range; fix uncond; multi guidance validation
add script
2024-11-28 21:09:31 -08:00
Zhang Peiyuan
2a70d05b4f
[Feat] Training precision ( #57 )
2024-11-27 16:25:07 -08:00
Zhang Peiyuan
13f665e455
[Feat] PCM Distill; Refactor FM logit to be compatible with all SD3/Flux scheduler. ( #54 )
2024-11-26 12:26:24 -08:00
rlsu9 and runlong
5a5d0ef1a0
[feat]: Add Image-Video Mixture training to main repo ( #50 )
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Co-authored-by: runlong <r3su@ucsd.edu >
2024-11-24 14:36:45 -08:00
Zhang Peiyuan
45e4adca4d
[Fix]: Resolve config bug and seed ( #51 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-15 20:29:48 -08:00
Zhang Peiyuan and foreverpiano
7106eadffc
[feat]: Add LADD ( #45 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-15 19:28:41 -08:00
Yongqi Chen and Peiyuan Zhang
2f3a8661bf
[feat]: add lr scheduler; precision bug fix; add naive dataloader resume ( #49 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-14 22:57:38 -05:00
Yongqi Chen and Peiyuan Zhang
6d0082c1a9
[Feat] Lora resume ( #48 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-13 01:30:58 -05:00
Zhang Peiyuan and Yongqi Chen
3d9189571a
[feat]: Add lora ( #47 )
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Co-authored-by: Yongqi Chen <144848849+BrianChen1129@users.noreply.github.com >
2024-11-11 13:12:14 -08:00
Zhang Peiyuan
b042e321a1
[Refactor] Switch to FSDP ( #42 )
2024-11-09 15:46:25 -08:00
Zhang Peiyuan
52ba538e8e
[feat]: Add validation logging with SP ( #36 )
2024-11-05 14:46:20 -08:00
Zhang Peiyuan and foreverpiano
f0bc297260
[Feat] Sequence Parallel ( #31 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-05 08:13:01 -08:00
Peiyuan Zhang
8ec82cbc37
Generate synthetic dataset
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Delete Open Sora Plan Modeling
amend log validation
Change name to fast video
Remove OSP modeling
clean up name changing
remove files
Deleted unnecessary files
commit first
commit first
training
ok
Update generate_synthetic.sh and deepspeed_zero2_config.yaml
14
debug
overfitting ....
debugging ..
Debug successful!
Add zero3
OK
update optimizer
load
small bug
random seed args
sp enable & still has bug
rename
update inference sp code / can run / still has bug / don't output normal mp4
switch to deepspeed dummyoptim
fix some bugs; still output green
SP inference done!
fix typos in readme and latent dataset debug file
2024-10-28 00:44:02 +00:00
Zhang Peiyuan