Davids048 and Claude Opus 5.5
c7c2d77fae
[bugfix]: apply the LTX-2 refine LoRA to the refine transformer
...
The from_pretrained keyword ltx2_refine_lora_path set
pipeline.components.lora_path, which reaches FastVideoArgs.lora_path and loads
as the main LoRA on the stage-1 transformer. The refine stage reads
FastVideoArgs.ltx2_refine_lora_path, which stayed unset. The conversion also
turned an empty string into None. An empty string is how callers such as the
Dreamverse GPU pool disable the refine LoRA, and None makes LTX2Pipeline load
the checkpoint default instead: fastvideo_refine_lora_path in model_index.json
is FastVideo/LTX2-Distilled-LoRA for the LTX-2 Diffusers checkpoints.
The refine LoRA gets its own field, pipeline.ltx2.refine.lora_path, whose
flat name is ltx2_refine_lora_path. None keeps the checkpoint default, and an
empty string disables the refine LoRA. The Dreamverse contract test, the
Dynamo contract example, and the parity inventory point at the field.
Golden changes: kwargs/ltx2_refine_lora_path now records the path on
ltx2_refine_lora_path instead of lora_path, and the added case
kwargs/ltx2_refine_lora_disabled pins the empty string.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
Claude-Session: https://claude.ai/code/session_012M91wnVFmPEvJ9h39r5BH7
2026-10-02 18:29:37 +00:00
Davids048 and Claude Opus 5.5
991fa391ff
[refactor]: name the model-family config partitions *Options
...
The schema class MiniMaxH3Config had the same name as the MiniMax-H3 DiT
config class in fastvideo/configs/models/dits/minimax_h3.py. The family
partitions of PipelineSelection are renamed LTX2Options, LTX2RefineOptions,
MiniMaxH3Options, and LongCatOptions, so their names cannot be confused with
the model and pipeline config classes.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
Claude-Session: https://claude.ai/code/session_012M91wnVFmPEvJ9h39r5BH7
2026-10-02 17:49:25 +00:00
Davids048 and Claude Opus 5.5
ecb15bf9e0
[refactor]: move repository configs and examples off pipeline.experimental
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Every key that repository YAML configs, Python examples, the Dreamverse
backend, and tests passed through pipeline.experimental has a typed
GeneratorConfig field, so they use those fields instead:
engine.attention, engine.compile.regional, pipeline.flow_shift,
pipeline.embedded_cfg_scale, pipeline.dmd_denoising_steps,
pipeline.components.lora_nickname, pipeline.minimax_h3, and
pipeline.longcat. No repository config outside the tests uses
pipeline.experimental any more.
The flat FastVideoArgs keywords that each migrated YAML file and each
basic_fasth3.py option set produces match the previous ones. The golden
snapshots of the two Hunyuan scripts now record embedded_cfg_scale and
flow_shift as floats (6.0 instead of 6), because the typed fields are
floats. The guidance tensor is built as float32 either way. The golden case
untyped_experimental_keys is renamed attention_precision_and_flow_shift with
identical content, and keys_without_typed_fields covers keywords that still
go to pipeline.experimental.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
Claude-Session: https://claude.ai/code/session_012M91wnVFmPEvJ9h39r5BH7
2026-10-02 17:37:22 +00:00
Aryan Kumar and Aryan Kumar
7f03e03dc6
[docs]: FastH3 V2 cookbook serving and MLX install guide ( #1884 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-29 13:03:18 -07:00
Aryan Kumar
361f919c88
[feat]: add a narrow FastH3 8-step MLX ladder
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Keep the four-step uniform AdaLN cache, and use explicit DMD rungs only when the snapshot declares its own scheduler shifts.
2026-09-23 11:06:55 -07:00
William Lin
0100218594
[feat] Support the FastH3 8-Step V2 checkpoint: checkpoint-defined shifts, explicit DMD schedule, new example ( #1852 )
2026-09-15 14:13:45 -07:00
a943220c11
[bugfix]: drop dead h3_sequential_load from Spark FastH3 presets ( #1831 )
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Co-authored-by: Cursor Agent <cursoragent@cursor.com >
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-08 12:38:06 -07:00
Junda Su
4e52f47d1e
[feat] add MXFP8 support on H3 ( #1796 )
2026-09-05 17:08:58 -07:00
Aryan Kumar and Aryan Kumar
0bd19a976b
[docs]: add one-Spark FastH3 cookbook runtime with a device-count row ( #1811 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-02 10:05:59 -07:00
aaef49bfc6
[feat]: run FastH3 across two DGX Sparks with Ray sequence parallel ( #1803 )
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Co-authored-by: Kyle <shh075@ucsd.edu >
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com >
Co-authored-by: Satyam Srivastava <srivastavasatyam53@gmail.com >
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-09-01 01:37:23 -07:00
Aryan Kumar and Aryan Kumar
cf6a00b9be
[feat]: add opt-in CUDA TAEH3 preview decode for FastH3 ( #1795 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-31 23:34:56 -07:00
Aryan Kumar and Aryan Kumar
a28f2bab4b
[feat] Add an optional MLX TAEH3 preview decoder ( #1794 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-31 05:08:06 -07:00
Aryan Kumar and Aryan Kumar
f82d8be4bf
[perf] Sequential MiniMax H3 start with GPU-direct DiT load ( #1793 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-31 04:20:21 -07:00
Suhaan Khurana
29ff16ec96
[feat] Add MiniMax H3 MLX spatial fast mode ( #1789 )
2026-08-30 17:47:02 -07:00
a4d9a75e2c
[perf] Add MiniMax H3 MLX VSA and SIMD attention ( #1776 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
2026-08-30 13:44:54 -07:00
ac48bb3cd1
[feat] Add MiniMax H3 MLX T2VA inference ( #1770 )
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Co-authored-by: Aryan Kumar <aryank@Aryans-Mac-Studio.local >
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
Co-authored-by: CodeRabbit <noreply@coderabbit.ai >
2026-08-28 12:54:33 -07:00
William Lin and shaoxiongduan
a534ba20a0
[feat] Add MiniMax H3 LoRA inference and preview launchers ( #1771 )
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Co-authored-by: shaoxiongduan <shaoxiongduan@gmail.com >
2026-08-27 14:43:39 -07:00
William Lin
9212f4f218
[ci] make GPU validation change-aware ( #1747 )
2026-08-25 21:26:25 -07:00
Aryan Kumar and Aryan Kumar
6388db815b
[bugfix] FastMetal-QAD MLX support: refuse CUDA QAD trees, use packed mlx_dit config, stream loads ( #1736 ) ( #1758 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-25 14:51:40 -07:00
William Lin
a837fe841a
[docs] Update FastH3 README ( #1749 )
2026-08-23 05:05:58 -07:00
William Lin
f9e3680f11
[perf] Align FastH3 optimized inference profile ( #1748 )
2026-08-23 02:01:03 -07:00
William Lin
13213395b4
[perf] Parallelize MiniMax-H3 VAE over sequence ranks ( #1744 )
2026-08-22 18:05:31 -07:00
William Lin
d3cff517cd
[perf] Add opt-in regional fullgraph compile for DiT inference ( #1741 )
2026-08-22 12:14:39 -07:00
William Lin
6d6a10be7a
[feat] FastVideo-Minimax-FastH3-Preview few-step example + 64-token-tile VSA-H3 inference path ( #1731 )
2026-08-21 12:40:09 -05:00
Shao Duan
c4ad4227c0
[misc] MiniMax-H3: move the AdaLN converter into scripts/checkpoint_conversion ( #1712 )
2026-08-21 02:15:00 -05:00
Aryan Kumar and Aryan Kumar
8537dcd6de
[feat]: Apple Silicon MLX runtime — INT8 Wan2.1 and Wan2.2 inference ( #1638 )
...
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-08-18 15:08:00 -07:00
Kai
0653f8f3af
[new-model] Add V2A: native MMAudio inference pipeline ( #1622 )
2026-08-09 17:29:27 -07:00
Shao Duan
541ef014ee
[perf] MiniMax-H3: rank-reduced AdaLN pruned model option (-39% params, -23 GiB VRAM) ( #1699 )
2026-08-09 12:31:57 -07:00
William Lin
9028953625
[misc] yapf pass under CI's interpreter (3.12) + pin hook language_version ( #1702 )
2026-08-08 22:24:17 -07:00
William Lin
15568f27db
[perf]: H3 torch.compile + CUDA graphs (1.2-1.3x) with denoising step marking ( #1689 )
2026-08-06 16:23:33 -07:00
Kaiqin Kong
e8b0e4c61e
[feat] Add MiniMax H3 ( #1674 )
2026-08-04 13:54:39 -07:00
William Lin
af2934dd6b
[feat]: FA4-FP4 ATTN_QAT_INFER on sm_100/sm_103 + NVFP4 weight purge ( #1647 )
2026-07-27 15:46:52 -07:00
Junda Su
755a4e4470
[new-model] Add LingBot-Video Dense and MoE/refiner T2V inference ( #1595 )
2026-07-18 20:18:16 -07:00
Junda Su
d4bdd3621a
[new-model] Port LingBot-World-v2 ( #1579 )
2026-07-16 19:51:53 -07:00
6966f9e0bc
[fix] Z-Image ( #1236 ) draft port: rebase + strict-load contract + bf16 encoder parity + PORT_STATUS ( #1339 )
...
Co-authored-by: Mrinaal Dogra <mdogra@ucsd.edu >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
2026-07-16 18:18:25 -07:00
b063f8ca41
[feat] Fix FLUX.1-dev port: native RoPE, parity tests, SSIM reference ( #1321 )
...
Co-authored-by: Ishan Vaish <ivaish@ucsd.edu >
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com >
2026-07-13 01:49:42 -07:00
Shreejith SG and H1yori233
d82abc271e
[feat] Add GLM-Image inference support ( #1030 )
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Co-authored-by: H1yori233 <k1kong@ucsd.edu >
2026-07-12 22:42:42 -07:00
02e1143f22
[feat] Add Kandinsky-5 T2V/I2V pipeline support ( #1471 )
...
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
Co-authored-by: leffff <levnovitskiy@gmail.com >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
2026-07-07 14:43:30 -07:00
595f0ea60e
[feat] Add DreamX-World 5B Cam and AR pipelines ( #1538 )
...
Co-authored-by: Suckl <Suckl@users.noreply.github.com >
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
2026-07-07 06:16:18 +00:00
William Lin
b36d0ef085
[infra] Add DGX Spark and multi-architecture CUDA support ( #1447 )
2026-07-03 13:41:43 -07:00
alexzms
2a4fe697a6
[docs] LTX-2.3 distilled i2v: typed-API example (from_config + generate) ( #1448 )
2026-06-10 10:58:14 -07:00
alexzms
921db7479d
[perf] LTX-2.3 distilled i2v: drop max-autotune from compile kwargs ( #1445 )
2026-06-10 10:06:41 -07:00
Aryan Kumar and Aryan Kumar
7f539424cb
[feat]: add Lucy Edit inference scaffold ( #1363 )
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Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com >
2026-06-09 15:21:43 -07:00
d922ab2cbc
[model] Flux2 Klein Port ( #1349 )
...
Co-authored-by: Gnav3852 <63612880+Gnav3852@users.noreply.github.com >
Co-authored-by: Mac Lee <macthecadillac@gmail.com >
2026-06-09 14:55:55 -07:00
alexzms and mergify[bot]
922e7e0813
[docs] LTX-2.3 distilled i2v example with compile + timing breakdown ( #1430 )
...
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-06-05 01:26:50 +00:00
Kaiqin Kong and SolitaryThinker
afdb6fbfa5
[feat] Add MatrixGame3.0 ( #1201 )
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Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
2026-05-27 21:07:01 +00:00
Kaiqin Kong and mergify[bot]
773d44b875
[misc] Rename MatrixGame to MatrixGame2 ( #1357 )
...
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-05-17 22:57:03 -07:00
d2ffec5cce
[perf] Dreamverse 14/14: Add LTX2 profile speedups ( #1337 )
...
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com >
Co-authored-by: Matthew Noto <99706358+RandNMR73@users.noreply.github.com >
Co-authored-by: XOR-op <17672363+XOR-op@users.noreply.github.com >
Co-authored-by: Zhang Peiyuan <42993249+jzhang38@users.noreply.github.com >
2026-05-15 18:10:47 -07:00
William Lin
140bd1a6cf
[misc]: standardize install instructions on uv pip install ( #1279 )
2026-05-02 12:45:50 -07:00
William Lin
c77a76c6af
[feat] Stable Audio Open 1.0: T2A + A2A + RePaint inpainting (native) ( #1260 )
2026-05-01 00:07:11 -07:00