rlsu9
163f9227ff
update
2024-12-12 21:26:03 +00:00
rlsu9
98070d9bca
add val gen
2024-12-12 19:54:22 +00:00
rlsu9
dfb15828a8
rename preprocess
2024-12-12 19:53:57 +00:00
rlsu9
ef667b9942
move data preprocess
2024-12-12 19:12:58 +00:00
rlsu9
01282b7622
debug ac; disitll; move fsdp_util
2024-12-12 19:07:43 +00:00
rlsu9
b14cc034e4
update
2024-12-12 18:11:04 +00:00
Peiyuan Zhang
6e5cb4b8e5
update
2024-12-12 06:34:22 +00:00
Peiyuan Zhang
87913376be
add training
2024-12-12 05:59:11 +00:00
Peiyuan Zhang
ce22b1279d
vae done
2024-12-12 00:41:02 +00:00
Peiyuan Zhang
f1dba33df7
update
2024-12-11 23:56:13 +00:00
Peiyuan Zhang
e8ce4290ff
update
2024-12-11 20:27:18 +00:00
Peiyuan Zhang
fb1cc737e3
the same input output format for transformer
2024-12-11 19:56:57 +00:00
Peiyuan Zhang
f5074a5c31
refactor single card attention to no pad
2024-12-11 19:00:10 +00:00
Peiyuan Zhang
0d4ae825c9
add no pad; support batch size > 1
2024-12-11 18:39:30 +00:00
Peiyuan Zhang
da66e0fcea
move rope freq inside transformer
2024-12-11 18:18:44 +00:00
foreverpiano
97f9db9b71
update
2024-12-11 13:36:38 +00:00
foreverpiano
e297fe3949
make distill a framework
2024-12-11 13:33:24 +00:00
foreverpiano
dd2cf8ad69
update
2024-12-11 13:04:48 +00:00
foreverpiano
f5f5903aa4
update sp
2024-12-10 13:59:33 +00:00
foreverpiano
20b03a45d7
update
2024-12-09 10:25:53 +00:00
foreverpiano
2e4b523bee
fps=24
2024-12-09 10:16:26 +00:00
foreverpiano
ea0332f62a
inference hunyuan ok
2024-12-09 10:10:59 +00:00
Zhang Peiyuan
de1e8d868e
Cleanup ( #75 )
2024-12-06 20:56:06 -08:00
Brian Chen and BrianChenn1129
98b92be25e
add web demo ( #73 )
...
Co-authored-by: BrianChenn1129 <yonqgich@umich>
2024-12-06 09:47:22 -08:00
Zhang Peiyuan and foreverpiano
8d41d505fe
[cleanup] ( #72 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-12-05 21:02:10 -08:00
Brian Chen
8cfdf58a17
[Feat] HF Lora
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yongqich@umich.edu
2024-12-05 18:50:53 -08:00
Zhang Peiyuan
cf15594055
[Feat & Debug] fix uncond; multi guidance validaiton; multiphase schedule; linear range ( #64 )
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typo
update
update
typo
[Debug] Typo (#65 )
debug gradient accumulation loss
update gitignore
typo
typo
update scripts
update experiment 10
new script
typo
update
update
update
update
wandb offline and dir
runlong
update
update
update
update
update
update
update
fix finetune code bug
update
update
update
add l2
update
2024-11-30 16:43:24 -08:00
Zhang Peiyuan
ce95c2df29
[Feat] EMA Distill; Distributed validation ( #63 )
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update
2024-11-29 21:46:40 -08:00
Zhang Peiyuan
d417e4c7c4
[Feat] Refactor GAN; State saving & Resume; Experiments script ( #59 )
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typo
add upload command
add
add ema_transform
add ema transformer
remove harcode
ok
ema
remove hardcode
update env
update script; no sp
revert to sp=4, sp bs=2, full shard
add aws efo env
distributed validation
readme
distributed validation
add gupload
linear range; fix uncond; multi guidance validation
add script
2024-11-28 21:09:31 -08:00
Zhang Peiyuan
2a70d05b4f
[Feat] Training precision ( #57 )
2024-11-27 16:25:07 -08:00
Zhang Peiyuan
03187fd83a
[Feat][Debug] linear quadratic distill; HF precision bug ( #56 )
2024-11-27 15:13:20 -08:00
Zhang Peiyuan
8a128ad815
[Fix] Squeeze bug ( #55 )
2024-11-26 13:29:03 -08:00
Zhang Peiyuan
13f665e455
[Feat] PCM Distill; Refactor FM logit to be compatible with all SD3/Flux scheduler. ( #54 )
2024-11-26 12:26:24 -08:00
rlsu9 and Runlong
94ba0ab6ea
[feat]: Add batchy data preprocess ( #53 )
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Co-authored-by:Runlong <rlsu9@ucsd.edu >
2024-11-25 21:52:36 -08:00
rlsu9 and runlong
5a5d0ef1a0
[feat]: Add Image-Video Mixture training to main repo ( #50 )
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Co-authored-by: runlong <r3su@ucsd.edu >
2024-11-24 14:36:45 -08:00
Zhang Peiyuan
45e4adca4d
[Fix]: Resolve config bug and seed ( #51 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-15 20:29:48 -08:00
Zhang Peiyuan and foreverpiano
7106eadffc
[feat]: Add LADD ( #45 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-15 19:28:41 -08:00
Yongqi Chen and Peiyuan Zhang
2f3a8661bf
[feat]: add lr scheduler; precision bug fix; add naive dataloader resume ( #49 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-14 22:57:38 -05:00
Yongqi Chen and Peiyuan Zhang
6d0082c1a9
[Feat] Lora resume ( #48 )
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Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com >
2024-11-13 01:30:58 -05:00
Zhang Peiyuan and Yongqi Chen
3d9189571a
[feat]: Add lora ( #47 )
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Co-authored-by: Yongqi Chen <144848849+BrianChen1129@users.noreply.github.com >
2024-11-11 13:12:14 -08:00
Zhang Peiyuan
b042e321a1
[Refactor] Switch to FSDP ( #42 )
2024-11-09 15:46:25 -08:00
rlsu9
44bda9f8a3
[feat]: Add adaptive fps dataloader and remove redundant code ( #41 )
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No checkout mochi
2024-11-06 19:52:48 -08:00
rlsu9
035ba5f5cf
[feat]: Add vae encoder embedded generator to main ( #30 )
2024-11-06 11:58:15 -08:00
Zhang Peiyuan
52ba538e8e
[feat]: Add validation logging with SP ( #36 )
2024-11-05 14:46:20 -08:00
Zhang Peiyuan and foreverpiano
f0bc297260
[Feat] Sequence Parallel ( #31 )
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Co-authored-by: foreverpiano <pianoqwz@gmail.com >
2024-11-05 08:13:01 -08:00
rlsu9
7413b1dd5f
[feat]: update data preprocess
2024-10-31 00:13:05 +00:00
Peiyuan Zhang
8ec82cbc37
Generate synthetic dataset
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Delete Open Sora Plan Modeling
amend log validation
Change name to fast video
Remove OSP modeling
clean up name changing
remove files
Deleted unnecessary files
commit first
commit first
training
ok
Update generate_synthetic.sh and deepspeed_zero2_config.yaml
14
debug
overfitting ....
debugging ..
Debug successful!
Add zero3
OK
update optimizer
load
small bug
random seed args
sp enable & still has bug
rename
update inference sp code / can run / still has bug / don't output normal mp4
switch to deepspeed dummyoptim
fix some bugs; still output green
SP inference done!
fix typos in readme and latent dataset debug file
2024-10-28 00:44:02 +00:00