Frees v2/models/ to become the vendored-architecture namespace that mirrors fastvideo/models (part of making v2 self-contained / able to replace fastvideo). The v2 recipe layer (per-family card.py/loop.py/program.py + common.py + the build_*_engine re-exports) is the recipe, not the architectures, so it moves to v2/recipes/. The pure-numpy toy/parity implementations (ToyDiT etc.) move from v2/models/backend.py to v2/platform/backends/toy.py (alongside cpu.py/accel.py/torch_*). Mechanical: all imports are absolute, so v2.models.<x> -> v2.recipes.<x> and v2.models.backend -> v2.platform.backends.toy across v2/ + examples/ (89 files, 178 refs). No behavior change. CPU mini green (202 passed, 2 skipped); all v2 files compile.
40 lines
1.6 KiB
Python
40 lines
1.6 KiB
Python
"""The batch-of-N interleave parity gate (design_v3 §9.3) — the bet loop-inversion lives/dies on.
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Two+ concurrent requests, interleaved at step granularity, MUST be bit-identical to the same
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requests run serially. A batch-of-1 gate is structurally blind to cross-request state smearing;
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this gate is not.
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"""
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from __future__ import annotations
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from v2.recipes import build_default_engine
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from v2.parity import assert_interleave_parity
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from v2.request import DiffusionParams, TaskType, make_request
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def _req(mid, prompt, seed, steps=4):
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return make_request(TaskType.T2V, mid, prompt,
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diffusion=DiffusionParams(num_steps=steps, guidance_scale=5.0, seed=seed))
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def test_interleave_parity_all_three_models():
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eng = build_default_engine()
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for mid in eng._registry:
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reqs = [_req(mid, "alpha", 11), _req(mid, "beta", 22), _req(mid, "gamma", 33)]
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divs = assert_interleave_parity(eng, reqs)
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assert not divs, f"{mid} interleave gate FAILED: {divs}"
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def test_interleave_parity_shared_prompt_and_cache():
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# shared prompt exercises the cross-request feature cache; must still be bit-identical
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eng = build_default_engine()
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reqs = [_req("wan2.1-1.3b", "shared", 7), _req("wan2.1-1.3b", "shared", 7),
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_req("wan2.1-1.3b", "shared", 9)]
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assert not assert_interleave_parity(eng, reqs)
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def test_interleave_parity_mixed_step_counts():
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# a 2-step and an 8-step request interleave; fairness, not corruption
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eng = build_default_engine()
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reqs = [_req("wan2.1-1.3b", "short", 1, steps=2), _req("wan2.1-1.3b", "long", 2, steps=8)]
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assert not assert_interleave_parity(eng, reqs)
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