4 people 8f1eb2992c [bugfix]: retain NVFP4 weights for LTX2 refinement LoRA (#1705) ...

Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-07 03:29:46 -07:00

..

test_absmax_fp8.py

[misc] yapf pass under CI's interpreter (3.12) + pin hook language_version (#1702)

2026-08-08 22:24:17 -07:00

test_fp8_compute_gate.py

[bugfix] FP8: gate the ROCm _scaled_mm path on CDNA4 (gfx950) instead of the capability tuple (#1859)

2026-09-16 19:58:55 -07:00

test_fp8_quant_kernels.py

[perf] FP8: fuse the dynamic activation quantization into Triton kernels (#1861)

2026-10-07 03:20:04 -07:00

test_minimax_h3_modelopt_activation_scale.py

[feat]: FastH3 on single RTX GPUs (#1919)

2026-10-06 11:37:01 -07:00

test_minimax_h3_modelopt_nvfp4_converter.py

[feat]: FastH3 on single RTX GPUs (#1919)

2026-10-06 11:37:01 -07:00

test_mxfp8.py

[bugfix]: requantize MXFP8 weights after LoRA unmerge (#1876)

2026-10-07 01:38:02 -07:00

test_nvfp4_config.py

[feat]: FastH3 on single RTX GPUs (#1919)

2026-10-06 11:37:01 -07:00

test_nvfp4_dequant.py

[feat]: FastH3 on single RTX GPUs (#1919)

2026-10-06 11:37:01 -07:00

test_nvfp4_h3_dit_export.py

[feat]: FastH3 on single RTX GPUs (#1919)

2026-10-06 11:37:01 -07:00

test_nvfp4_ltx2_wiring.py

[misc] yapf pass under CI's interpreter (3.12) + pin hook language_version (#1702)

2026-08-08 22:24:17 -07:00

test_nvfp4_minimax_h3_wiring.py

[bugfix]: requantize MXFP8 weights after LoRA unmerge (#1876)

2026-10-07 01:38:02 -07:00

test_nvfp4_purge.py

[bugfix]: retain NVFP4 weights for LTX2 refinement LoRA (#1705)

2026-10-07 03:29:46 -07:00

test_nvfp4_qat_receipt.py

[misc]: add LTX-2.3 fine-tuning example recipes (#1651)

2026-07-27 18:42:44 -07:00

test_nvfp4_spark_fence.py

[feat]: FastH3 on DGX Spark and Apple Silicon (#1920)

2026-10-06 12:17:11 -07:00