SolitaryThinker c73ccc75ed [feat]: VSA training gate — capture/anchor vsa mode, per-step ramped metadata through FinetuneStep

2026-07-23 04:50:49 -07:00

..

evidence

[evidence]: finetune training parity vs main — step0 bitwise, later steps within measured self-noise band

2026-07-23 04:48:32 -07:00

layers

[fix]: quantize fp8 weights lazily on the serving device (main converts post-GPU; CPU fp8 casts can round differently); ledger GateResult

2026-07-22 20:02:56 -07:00

tests

[feat]: SFWan port — vendored causal block/model (per-frame temb, KV+cross caches, fp64 rope at absolute positions), chunked causal DMD loop, card, sfwan capture+anchor

2026-07-23 03:43:22 -07:00

train

[feat]: VSA training gate — capture/anchor vsa mode, per-step ramped metadata through FinetuneStep

2026-07-23 04:50:49 -07:00

wan21

[fix]: per-class accepted checkpoint _class_name (causal)

2026-07-23 04:17:33 -07:00

__init__.py

[feat]: offline SDK — Model/Result (modality-neutral handle over the gated engine path)

2026-07-22 15:54:30 -07:00

__main__.py

[feat]: fastvideo2 MVP — data cards, driven loop, enforced pipelines, wan2.1 reference oracle, tiered verifier + evidence ledger

2026-07-22 07:24:24 -07:00

card.py

[feat]: align the DiT with official — vendored WanModel (pinned 9737cba) + official weights + official autocast regime

2026-07-22 15:20:45 -07:00

cli.py

[feat]: offline SDK — Model/Result (modality-neutral handle over the gated engine path)

2026-07-22 15:54:30 -07:00

engine.py

[feat]: align the DiT with official — vendored WanModel (pinned 9737cba) + official weights + official autocast regime

2026-07-22 15:20:45 -07:00

loading.py

[fix]: split storage vs compute dtype — DiT stores fp32 like official, computes bf16 via provenance.precision autocast

2026-07-22 15:25:50 -07:00

loop.py

[feat]: fastvideo2 MVP — data cards, driven loop, enforced pipelines, wan2.1 reference oracle, tiered verifier + evidence ledger

2026-07-22 07:24:24 -07:00

pipeline.py

[feat]: fastvideo2 MVP — data cards, driven loop, enforced pipelines, wan2.1 reference oracle, tiered verifier + evidence ledger

2026-07-22 07:24:24 -07:00

registry.py

[feat]: SFWan port — vendored causal block/model (per-frame temb, KV+cross caches, fp64 rope at absolute positions), chunked causal DMD loop, card, sfwan capture+anchor

2026-07-23 03:43:22 -07:00

sdk.py

[misc]: model_id is the only load key — HF repo strings are card ingredients, never resolvable

2026-07-22 16:06:59 -07:00

verify.py

[misc]: wan21/gates/ — separate the measurement side (goldens, anchor, capture, compare, probe) from logic code

2026-07-22 16:25:43 -07:00