A scoped, CPU-testable realization of design_v3.md — the architecture where the atomic unit is a typed (recipe, runtime) ModelCard, the model owns loop semantics while the runtime owns loop lifecycle, one resident instance runs many loops, and training records behavior on the same loops it serves. Implements: - card/ loop/ runtime/ cache/ memory/ parallel/ parity/ extend/ program/ request/ training/ spanning design_v3 §4-§13: ModelCard + validate(); driven loops (init/next/advance/finalize); step-interleaving Engine with reservation-before-admission + per-class caches keyed by CacheKey; the C0-C4 consistency ladder + the non-negotiable batch-of-N interleave parity gate. - Inference: Wan2.1-1.3B (T2V), LTX2.3 (two-stage distilled, shared transformer), Wan-causal (chunk rollout + slab-KV streaming). - Training (Wan2.1-1.3B), each driving the SAME loops the engine serves: finetune (flow-match), DMD2 (teacher/critic distribution matching), DiffusionNFT (likelihood-free C2, samples from the decay-blended old policy, group-relative advantages, shared-prompt cache reuse), self-forcing (causal chunk loop). The engine never imports training (the §10 dependency rule, grep-verified). numpy-only core (no torch/GPU here); heavy Wan/LTX forwards are deterministic toy stand-ins with lazy torch-adapter seams (ComponentSpec.load_id/factory) for a GPU box. 49 tests pass via pytest and a zero-dependency runner; interleave parity verified (and a buggy module-global interceptor provably breaks it). Omni-ready spine (ar_decode/chunk_step loop kinds, multi-loop instances, LoopState.extension) for the phase-2 Cosmos3 + vllm-omni omni ports. Run: python3 -m pytest mini_fastvideo/tests/ -q ; python3 -m mini_fastvideo.examples
59 lines
2.3 KiB
Python
59 lines
2.3 KiB
Python
"""Pre-flight parallelism validation (design_v3 §8).
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> Pre-flight or it fails at load, never halfway. Ownership conflicts are build errors
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> ... Applicability conditions travel with axes: ``pp_patch`` is invalid for causal/AR.
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All checks are CPU-testable on a fake mesh (design.md §6.3.4: CPU-testability).
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"""
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from __future__ import annotations
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from .._enums import LoopKind
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from .plan import AXIS_NAMES, ParallelPlan
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class ParallelValidationError(ValueError):
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pass
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# loop kinds whose causality is broken by PipeFusion displaced-patch pipelining
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_CAUSAL_KINDS = {LoopKind.CHUNK_ROLLOUT, LoopKind.AR_DECODE}
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def validate_plan(plan: ParallelPlan, card=None, *, world_size: int | None = None,
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cfg_policy_batched: bool = False) -> ParallelPlan:
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"""Validate a plan, optionally against a card. Returns the plan or raises.
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Checks (design_v3 §8):
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1. axis names are known; degrees >= 1
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2. cfgp <= 2
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3. product of degrees matches world_size (when given)
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4. pp_patch invalid for any causal/AR loop on the card
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5. ownership conflict: cfgp>1 AND a batched CFGPolicy is rejected (§5.3, §9 build-guard)
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"""
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errs: list[str] = []
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for name, deg in plan.axes.items():
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if name not in AXIS_NAMES:
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errs.append(f"unknown parallel axis {name!r} (known: {AXIS_NAMES})")
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if int(deg) < 1:
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errs.append(f"axis {name!r} has degree {deg} < 1")
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if plan.degree("cfgp") > 2:
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errs.append(f"cfgp degree {plan.degree('cfgp')} > 2 (CFG has at most 2 branches)")
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if world_size is not None and plan.world_size() != world_size:
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errs.append(f"product of degrees {plan.world_size()} != world_size {world_size}")
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if plan.degree("cfgp") > 1 and cfg_policy_batched:
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errs.append("ownership conflict: a request owns a BatchedCFG policy OR a cfgp group, never both "
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"(design_v3 §5.3 / §9 build-guard)")
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if card is not None and plan.degree("pp_patch") > 1:
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causal = [lid for lid, lp in card.loops.items() if lp.kind in _CAUSAL_KINDS]
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if causal:
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errs.append(f"pp_patch is invalid for causal/AR loops {causal} (stale KV breaks causality, §8)")
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if errs:
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raise ParallelValidationError("ParallelPlan failed validation:\n - " + "\n - ".join(errs))
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return plan
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