Commit Graph
943 Commits
Author SHA1 Message Date
Will LinandClaude Fable 5 b2a72b3933 docs: Slurm handoff for the 32x GB200 data-free DMD2 run
Pre-flight checklist, launch/scale-down commands, expected boot and step
timings, and known traps for submitting dmd2_32xgb200.sbatch from a login
node. Everything referenced is validated on a single 4x GB200 node.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-08-11 09:53:58 +00:00
Will LinandClaude Fable 5 a20b69a4a8 [train] MiniMax-H3 config suite: SFT sparsity sweep, data-free DMD2, 32-GPU Slurm launch, README
- fine_tuning/minimax_h3: FA4 dense control, VSA sparsity 0/0.8/0.9/0.95/0.97
  overfits, effective-batch-2 via gradient accumulation over two videos
  (validated: both losses decline, ~10 s/step on 4x GB200), and the 2-GPU
  configs kept as negative results (sp=2 backward working set OOMs 184 GiB).
- distribution_matching/minimax_h3: data-free DMD2 (rollout_mode: simulate)
  overfit and its 32-GPU scale-up (8 trays, sp=4, HSDP 8x4, global batch 64
  = 8 DP groups x accum 8).
- examples/train/slurm/dmd2_32xgb200.sbatch: login-node launch deriving
  world size/rendezvous from the allocation, per-node /dev/shm weight cache,
  per-node log dirs, CLUSTER-marked partition/account/container hooks.
- README.md in both config dirs: launch, topology/batch semantics, measured
  step times, memory findings, shard cache, preprocessing.
- pyproject: explicit setuptools include list.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-08-11 04:41:49 +00:00
Will LinandClaude Fable 5 69fb5af602 [train] H3 VSA/DMD2 training fixes: bf16 boundaries, validation offload, buffer-free AdamW
- VSA-H3 backend + DistributedAttention_VSA: cast autocast-fp32 activations
  to bf16 before comm/tiling (kernels are bf16-only; RMSNorm emits fp32
  under autocast), restore output dtype.
- minimax_h3 DiT: recompute gate_compress activity under grad instead of
  trusting a cached no-grad answer.
- Scheduler: shift_sigmas() helper; denoising stage honors
  pipeline_config.dmd_denoising_steps with per-modality shifts so validation
  samples at the exact training sigmas; batch.VSA_sparsity fallback.
- ValidationCallback: never .to('cpu') FSDP-managed modules, inject the
  method's dmd_denoising_steps, post-validation off-CUDA param scan;
  make_inference_args no longer defaults dit_cpu_offload=True (this offloaded
  the live training student after every validation).
- AdamWBeta1Zero: beta1=0 AdamW without the exp_avg buffer (mathematically
  identical; saves one full parameter-sized state per trainable model),
  auto-selected when betas[0] == 0.
- methods/base + train models: per-role attn kind for VIDEO_SPARSE_ATTN_H3,
  VSA metadata built in the base H3 model's prepare_batch (DMD wrapper
  inherits), device-scan probe compares against the model's own device.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-08-11 04:41:35 +00:00
Will LinandClaude Fable 5 10dee7b351 [feat] per-rank sharded base-weight cache for fast training relaunches
After a full checkpoint load each shard rank persists its local DTensor
chunks (post-rename, post-cast) to FASTVIDEO_WEIGHT_SHARD_CACHE (tmpfs);
identical (checkpoint, mesh, dtypes, name-mapping) launches rebuild via
DTensor.from_local in ~2-4 s per 33B model instead of ~10 min of cold-NFS
reads. DMD2's three roles share one entry; params absent from the cache
(gate_compress/proj_l) zero-init exactly like the full-load path. Any
validation failure or exception degrades to the normal full load.

FASTVIDEO_WEIGHT_SHARD_CACHE_PER_NODE=1 makes every HSDP replica write its
own node-local copy on multi-node runs (single-writer semantics would leave
non-zero replicas' nodes permanently cold). HITs refresh entry mtimes so
mtime-based tmpfs cleaners and the LRU GC spare active entries.

Also: distribute_tensor(src_data_rank=None) in the full-load path so every
rank feeds its own shard instead of scattering from rank 0.

5 CPU contract tests in fastvideo/tests/loader/test_shard_cache.py.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-08-11 04:41:12 +00:00
Will LinandClaude Fable 5 95f4f54712 [bugfix] Triton block-sparse backward: scale QK^T after the dot, keep K raw
The backward pre-scaled K by sm_scale*log2(e) in bf16 before recomputing
logits, so the recompute drifted from the forward's saved LSE proportionally
to |logit|; exp2 amplifies that into exponentially wrong probabilities and
garbage dK/dV (plus a mis-scaled dQ) at real activation magnitudes. Forward
was exact and unit-scale tests passed, which is how it survived — the Triton
path is only load-bearing off-Hopper (sm_90 uses the ThunderKittens CUDA
backward).

Fix: pass raw K, apply sm_scale*RCP_LN2 after tl.dot in fp32 in both
_attn_bwd_dkdv and _attn_bwd_dq, and scale dq by sm_scale instead of LN2.
Verified against SDPA to 4 significant digits at sm_scale 1/8/32 and at the
real H3 geometry (37,48,84 tiles, 128-dim heads).

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-08-11 04:40:58 +00:00
SolitaryThinker eb2cd4e1cd docs: on-tray handoff for the VSA-H3 DMD2 overfit experiment
staged state, copy-paste launch steps (container entry, env, config fix,
torchrun), expected signals, parity criteria, and the pre-paid traps.
(--no-verify: known mypy worktree-dirname hook issue only)
2026-08-09 15:21:52 -07:00
SolitaryThinker d81f1f166b [train] VSA-H3 DMD2 overfit: per-role backends, VSA metadata wiring, wandb guard
- MiniMaxH3Model: allow per-role attention backends (TORCH_SDPA/FLASH_ATTN/
  VIDEO_SPARSE_ATTN_H3); predict_noise routes attn_metadata_vsa for
  attn_kind='vsa' (dense roles keep None).
- MiniMaxH3DMDModel.prepare_batch builds real VSA-H3 metadata (packed
  text|cond|audio prefix segments via _h3_vsa_prefix_segments, sparsity from
  training.vsa.sparsity) when the role runs VIDEO_SPARSE_ATTN_H3.
- VSA-H3 tile(): fresh buffer for grad-tracking forwards; shared-buffer
  reuse trips autograd's in-place version check at student backward.
- build_tracker: degrade to DummyTracker when wandb is unimportable or has
  no credentials (modular stack already logs per-step loss dicts via the
  wandb tracker; no new callback needed).
- dmd2_vsa0_overfit.yaml: student VSA-H3 @ sparsity 0.0, teacher/critic
  FLASH_ATTN, 3-step DMD schedule, wandb project h3-dmd2-vsa.
- preprocess_minimax_h3_overfit: --video/--prompt/--output-dir/--model-path
  CLI; overfit_vsa0.sh: preprocess + 4-GPU torchrun with FASTVIDEO_FA4=1.
- CPU tests: VSA metadata build/routing, per-role backend override,
  wandb guard + loss-dict logging, tile-under-grad regression.
2026-08-09 14:46:58 -07:00
SolitaryThinker 7f81df6acf Merge remote-tracking branch 'origin/vsa-h3' into feat/h3-dmd2-vsa 2026-08-09 14:28:26 -07:00
SolitaryThinker dc70667483 [train] MiniMax H3 DMD2 distillation via packed dual-modality adapter
Add MiniMaxH3DMDModel, a DMD-capable subclass of the H3 training plugin
that presents both modality streams (video + stereo audio) to DMD2Method
as one packed [1, N] latent tensor, keeping dmd2.py untouched:

- pack/unpack adapters over [1,T,24,H,W] video + [1,2,32,Ta] audio
- integer [0,1000] method timesteps map to H3's shared base noise
  amount, shifted per modality (video 12.0 / audio 3.0) as in SFT
- add_noise / predict_noise / predict_x0 in the packed convention;
  explicit timesteps rewrite batch.(audio_)timesteps for row plans
  and backward forward-context coherence

Base wrapper: accept attn_kind='vsa' as dense under TORCH_SDPA (real
VSA-H3 metadata slots in once the VSA-H3 backend lands), and support
conditional=False teacher-CFG forwards via cfg_uncond={text: zero}
(H3 has no negative-prompt encoder at training time).

Also: H3 DMD2 example config + launch script, tiny-arch fixture, and
CPU contract tests covering one full single_train_step (both rollout
modes, both optimizers) plus the packed-adapter units.

Committed with --no-verify: the mypy pre-commit hook rejects this
worktree's dirname ('h3-dmd2 is not a valid Python package name'),
a known worktree-path issue unrelated to the change.
2026-08-09 13:34:46 -07:00
SolitaryThinker 7dece0471f [misc] VSA-H3: /simplify pass — dedupe with the Wan VSA backend, drop dead state
- scatter_into_tile_buf(): one copy of the zero-padded tile-buffer reuse
  invariant, shared by both VSA backends (was byte-identical twice)
- the H3 tile buffer is now builder-owned, so one buffer serves the whole
  denoising loop instead of a ~1.4 GB alloc+memset per step
- compute_topk(): H3's inline clamp math now reuses the Wan helper whose
  semantics are pinned by test_vsa_cur_topk_clamps_to_valid_block_range
- layer_idx_from_prefix() in abstract.py replaces two regex spellings
  (vmoba raises, H3 defaults to -1, both unchanged behaviorally)
- token_tile_and_valid(): single encoding of the pad-validity contract for
  the probe and the test oracle (was spelled three ways)
- vsa_mode: one knob, one validation point — FASTVIDEO_H3_VSA_MODE (zero
  readers) removed; batch.extra path now validates instead of silently
  mapping typos to compete
- dropped dead metadata fields (non_pad_index unread; tile_partition_indices
  had one test-only reader already covered by the untile-roundtrip check)
- removed cuda.py's redundant backend pre-import; fixed a stale layer.py
  shape comment

(--no-verify: mypy hook rejects the checkout dir name; yapf+ruff ran and
their fixes are included)
2026-08-09 12:58:59 -07:00
SolitaryThinker 281d07d978 [feat] VSA for MiniMax H3: packed mixed-modality sparse attention (FA4 CuTe sm10x), exempt/compete mask policies, gate-compress branch, per-request sparsity/schedule knobs, attention-mass probe 2026-08-09 12:39:48 -07:00
Shao Duan 541ef014ee [perf] MiniMax-H3: rank-reduced AdaLN pruned model option (-39% params, -23 GiB VRAM) (#1699) 2026-08-09 12:31:57 -07:00
William Lin ffc1a7a58b [refactor] H3 pipeline cleanup: shared helpers, dead machinery, loop-invariant hoists (#1698) 2026-08-09 04:51:31 -07:00
William Lin 9028953625 [misc] yapf pass under CI's interpreter (3.12) + pin hook language_version (#1702) 2026-08-08 22:24:17 -07:00
KyleNeverGivesUpandClaude Opus 5 6eb95693a1 [misc]: re-run yapf on main so pre-commit passes again (#1700)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-07 16:17:52 -07:00
Junda Su c3567eb468 [feat] add Minimax H3 sft pipeline (#1688) 2026-08-07 16:12:04 -07:00
William Lin 15568f27db [perf]: H3 torch.compile + CUDA graphs (1.2-1.3x) with denoising step marking (#1689) 2026-08-06 16:23:33 -07:00
Kaiqin Kong 126a75ad63 [misc] Support partial Hugging Face model downloads (#1684) 2026-08-06 16:09:46 -07:00
Raghav KandSolitaryThinker a2bfc7cdb2 [docs] DGX Spark (GB10) performance & tuning guide + reproduction examples (#1631)
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
2026-08-06 14:36:38 -07:00
William Lin b963a24612 [bugfix]: hard-fail when ATTN_QAT_INFER is selected but the kernel is unusable (#1690) 2026-08-06 13:12:27 -07:00
William Lin fb7be2fe2c [ci]: add golden-gate lane — single-layer bitwise DiT fingerprints for all SSIM-covered families (#1682) 2026-08-05 12:47:03 -07:00
William Lin ab00392664 [bugfix]: add GB200 to the inline SSIM device tables #1676 missed (#1681) 2026-08-05 10:33:46 -07:00
Shao Duan 9f1e7c19d2 [bugfix] Wan I2V: CLIP image conditioning silently dropped when passed as a tensor during training (#1673) 2026-08-05 01:35:09 -07:00
Kaiqin Kong e8b0e4c61e [feat] Add MiniMax H3 (#1674) 2026-08-04 13:54:39 -07:00
Haochen Jiang 9145ffdc46 [bugfix]: keep _resolved_attention_backend out of the positional config signature (#1678) 2026-08-03 17:09:15 -07:00
William Lin c3d07c870b [bugfix]: give GB200 its own SSIM reference folder instead of B200's (#1676) 2026-08-03 15:14:25 -07:00
William Lin e8812bef0b [docs]: batched docs cleanup (landing page, links, requirements, nav) (#1644) 2026-08-02 18:03:26 -07:00
William Lin b9be2449dc [refactor]: delete the dead global attention-backend override (#1672) 2026-08-02 18:00:42 -07:00
Adhvay IyerandSolitaryThinker bc7a804618 [bugfix]: harden FastVideo Studio UI reliability and accessibility (#1659)
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
2026-08-02 15:26:18 -07:00
William Lin 7b094c945b [refactor]: resolve attention backend once per component at load time (#1657) 2026-08-02 15:07:42 -07:00
William Lin eeb3e8a597 [bugfix]: left-align Gemma connector tokens per batch row (#1664) 2026-08-02 15:01:34 -07:00
Suhaan Khurana 05406c5d1b [misc]: consolidate dataset download scripts under examples/datasets/ (#1667) 2026-08-02 14:21:24 -07:00
KyleNeverGivesUpandClaude Opus 5 99d04a7f98 [bugfix] keep loader-populated text encoder configs in the validation pipeline (#1669)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-02 14:10:16 -07:00
William Lin 1b2b2a0161 [bugfix]: copy text encoder outputs out of CUDAGraph static buffers (#1650) 2026-07-27 21:52:53 -07:00
William Lin 98d65835b5 [misc]: refresh stale sm_120-only validation notes in QAT recipes (#1655) 2026-07-27 19:35:29 -07:00
William Lin 422585d08f [misc]: add LTX-2.3 fine-tuning example recipes (#1651) 2026-07-27 18:42:44 -07:00
ryanM154 e59a1ce16a [bugfix] Report actual package version in fastvideo --version (#1652) 2026-07-27 16:32:01 -07:00
William Lin d71acc0eb5 [bugfix]: fix stale imports in LTX-2.3 gradio local demo (#1640) 2026-07-27 16:31:07 -07:00
William Lin af2934dd6b [feat]: FA4-FP4 ATTN_QAT_INFER on sm_100/sm_103 + NVFP4 weight purge (#1647) 2026-07-27 15:46:52 -07:00
William Lin 1801512818 [docs]: cover all registered models in the support matrix (#1641) 2026-07-27 11:13:53 -07:00
William Lin 5ae05b032e [misc]: add LTX-2 fine-tuning example recipes (#1645) 2026-07-27 11:11:49 -07:00
Mac Lee 7a592ff09a [ci]: cache FastVideo kernel builds in Modal (#1562) 2026-07-26 04:21:09 -07:00
Lev NovitskiyandClaude Sonnet 5 8b23984c79 [feat] Add Kandinsky5 QAD training pipeline: data preprocessing, QAT finetune, QAT-aware DMD distillation (#1601)
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
2026-07-26 02:59:21 -07:00
William Lin bf18371afe [feat] Enable LTX-2 NVFP4 linear and attention QAT fine-tuning (#1626) 2026-07-26 02:19:34 -07:00
William Lin 69349dd2aa [docs]: unify community links on the README Slack invite (#1643) 2026-07-25 17:26:58 -07:00
Yogya MehrotraandClaude Sonnet 5 8d89f30d3f [bugfix] Skip CUDA-only fastvideo-kernel/flashinfer-python deps on non-Linux (#1574)
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
2026-07-23 14:23:45 -07:00
William Lin 10546353da [ci]: extend Full Suite training lane timeouts (#1616) 2026-07-23 13:00:00 -07:00
pkisfaludi-nvandClaude Opus 4.8 9fb74b9732 Make LTX-2 RMSNorm out-of-place so torch_tensorrt + Ulysses SP compiles (#1623)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-07-22 04:32:04 -07:00
Adriel FungandSolitaryThinker 521dee0e82 [perf]: enable per-block torch.compile for LTX2 with persistent cache (#1602)
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
2026-07-20 15:59:13 -07:00
William Lin 229419208e [ci]: opt in to fork-PR head checkout after actions/checkout guard change (#1625) 2026-07-20 13:12:22 -07:00