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KeithSolitaryThinkerClaude Opus 5.5
 		cdfbd64b04 [perf] FP8: fuse the dynamic activation quantization into Triton kernels (#1861) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 03:20:04 -07:00
Haochen JiangandClaude Opus 5.5 299d0f6838 [bugfix] wrap the generic DenoisingStage in the inference_denoising profiler region (#1707) 
profiler_region_inference_denoising was wrapped in exactly one place (minimax_h3_denoising.py), so every model using the generic DenoisingStage (Wan among them) exported a trace with no denoising region. Wrap the denoising loops in DenoisingStage and DmdDenoisingStage with profiler_region("inference_denoising"); the loop bodies are untouched.

These are the two classes STAGE_METRIC_MAP names directly. The perf harness also reports dit_time_s for every stage that inherits performance_component_metric, and those forward overrides (Cosmos*, LongCat*, Gen3C, GameCraft, HYWorld, MatrixGame2/3, Causal*, DreamXWorldAR, LingBot, GlmImage) remain outside the region for now. With no profiler configured the wrap is a no-op; SSIM is exactly 1.0 on FLASH_ATTN and TORCH_SDPA.

Caveat: the region span now appears in exported traces, but a pre-existing profiler behaviour (region exit toggles CUDA collection off, fastvideo/profiler.py) may leave GPU kernel rows out of the trace.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 03:19:42 -07:00
Joy JeffersonSolitaryThinkerClaude Opus 5.5
 		c18436125a [misc]: Refactor separate training pipeline runner (#1696) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 03:19:21 -07:00
IshanSolitaryThinkerClaude Opus 5.5
 		5d515ee617 [perf]: remove per-step host syncs and repeated work from causal inference (#1687) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 03:18:56 -07:00
page: FlappyBobSolitaryThinkerClaude Opus 5.5
 		37b9dc1836 [new-model] Add native Helios-Distilled T2V pipeline (#1670) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 03:18:24 -07:00
Suhaan KhuranaSuhaanCommitsClaude Fable 5SolitaryThinker
 		a0291a57c1 [ci] Add Wan2.2-TI2V-5B SSIM regression test (#1772) 
Co-authored-by: SuhaanCommits <suhaan@cedar.build>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
 2026-10-07 02:44:24 -07:00
Shao DuanWilliam LinSolitaryThinkerClaude Opus 5.5
 		6102fac00d [bugfix]: fix modular ops activation checkpoint recomputation (#1716) 
Co-authored-by: William Lin <8941107+SolitaryThinker@users.noreply.github.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:41:12 -07:00
alanhuangyooSolitaryThinkerClaude Opus 5.5
 		1ad33c1832 [feat] Support training_cfg_rate > 0 for LTX-2 (#1752) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:38:42 -07:00
Mac LeeSolitaryThinkerClaude Opus 5.5
 		da87973412 [ci] Clarify dashboard cohort grouping for legacy v1 records (#1613) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:33:18 -07:00
William LinandClaude Opus 5.5 a3fd1d0bab [ci]: prevent direct tests from minting suite gates (#1615) 
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:32:48 -07:00
KeithSolitaryThinkerClaude Opus 5.5
 		3e87d6f4ae [feat] ROCm: route the video sparse attention backends to their Triton kernels (#1851) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:32:27 -07:00
KeithSolitaryThinkerClaude Opus 5.5
 		4bb5627fa8 [feat] MiniMax H3: block-FP8 text encoder on Hopper, its converter, and a 4xH100 FastH3 profile (#1829) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:31:52 -07:00
KeithSolitaryThinkerClaude Opus 5.5
 		08ab8b5c00 [bugfix] ROCm: detect the platform from a HIP torch build when amdsmi is unavailable (#1849) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:20:47 -07:00
Kyle HuWilliam LinSolitaryThinkerClaude Opus 5.5
 		fb5efebdab [feat] Add HunyuanVideo 1.5 T2V training support (#1662) 
Co-authored-by: William Lin <willlin@nvidia.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:19:22 -07:00
YZJFSolitaryThinkerClaude Opus 5.5
 		6e4813f8b4 [bugfix] use in-process executor for num_gpus=1 (#1755) (#1879) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:18:23 -07:00
Yogya MehrotraClaude Fable 5SolitaryThinker
 		13ef81e6da [ci] Surface worker process logs on perf hard regressions (#1701) 
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
 2026-10-07 02:14:02 -07:00
Shao DuanSolitaryThinkerClaude Opus 5.5
 		13b3b36b8b [feat] Add Infinite Livestream app (#1878) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 02:07:37 -07:00
boxwrenchClaude Opus 5SolitaryThinker
 		72795d0af8 [perf] avoid full-sequence materialization in VSA coarse/sparse combine (#1813) 
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
 2026-10-07 01:54:35 -07:00
Satyam SrivastavaSolitaryThinkerClaude Opus 5.5
 		af63a92f6a [bugfix] Shut down Inductor workers gracefully (#1786) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:54:03 -07:00
SucklSucklSolitaryThinkerClaude Opus 5.5
 		a4e7322ba6 [bugfix]: synchronize post-FSDP LoRA replicas (#1666) 
Co-authored-by: Suckl <Suckl@users.noreply.github.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:53:30 -07:00
Raghav KSolitaryThinkerClaude Opus 5.5
 		d6e13f9cc8 [feat] Add VQeval long-video quality metric (#1727) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:39:11 -07:00
Jie LuoSolitaryThinkerClaude Opus 5.5
 		6c4c18690e [bugfix] Enable SP for LongCat BSA refinement (#1862) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:38:43 -07:00
YZJFSolitaryThinkerClaude Opus 5.5
 		a8688dddd9 [bugfix]: requantize MXFP8 weights after LoRA unmerge (#1876) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:38:02 -07:00
Kyle HuSolitaryThinkerClaude Opus 5.5
 		cacc8cfcb3 [bugfix]: condition HunyuanVideo 1.5 i2v on the reference image (#1693) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:36:35 -07:00
Suhaan KhuranaSuhaanCommitsClaude Fable 5SolitaryThinker
 		ef62ac48d1 [new-model] Add Wan2.2-S2V-14B speech-to-video (model port + checkpoint converter) (#1683) 
Co-authored-by: SuhaanCommits <suhaan@cedar.build>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
 2026-10-07 01:36:01 -07:00
Raghav KSolitaryThinkerClaude Opus 5.5
 		00cb7d0ba2 [ci] Add DGX Spark (GB10) single-GPU perf config + gpu_types gating (#1679) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:30:42 -07:00
jayzouSolitaryThinkerClaude Opus 5.5
 		69a6215e7f [feat] Add Dreamverse multimodal inputs and H3 routing (#1835) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:30:26 -07:00
Jack ChenSolitaryThinkerClaude Opus 5.5
 		abe98e87f5 [feat] Add phase-aware modular training performance metrics (#1826) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:30:11 -07:00
Kyle HuSolitaryThinkerClaude Opus 5.5
 		274b922d39 [misc]: surface GenerationResult.peak_memory_mb in the MiniMax H3 examples (#1785) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:29:56 -07:00
Kyle HuWilliam LinSolitaryThinkerClaude Opus 5.5
 		38966056d0 [ci]: make merge-gate startup reliable (#1762) 
Co-authored-by: William Lin <8941107+SolitaryThinker@users.noreply.github.com>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:29:42 -07:00
alanhuangyooSolitaryThinkerClaude Opus 5.5
 		d8ca702dfd [bugfix] registry: register magi_human presets (#1751) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
 2026-10-07 01:28:53 -07:00
William Lin 33d81730e9 [feat]: Kandinsky 6 Lite: register the 3.2B checkpoints and add docs + cookbook recipes (#1927) 2026-10-06 17:09:53 -07:00
Aryan KumarAryan KumarAryan KumarSolitaryThinkerClaude Opus 5.5
 		02a027c49f [feat]: FastH3 on DGX Spark and Apple Silicon (#1920) 
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
Co-authored-by: Aryan Kumar <aryank@Aryans-Mac-Studio.local>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-06 12:17:11 -07:00
Aryan Kumar e235b6a332 [docs] Announce FastH3 on consumer hardware and FastH3 Trim (#1923) 2026-10-06 11:39:24 -07:00
Aryan KumarAryan KumarAryan KumarSolitaryThinkerClaude Opus 5.5
 		8b51380466 [feat]: FastH3 on single RTX GPUs (#1919) 
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
Co-authored-by: Aryan Kumar <aryank@Aryans-Mac-Studio.local>
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-06 11:37:01 -07:00
William Lin 527a3165b9 [docs]: add Kandinsky 6 to the README news (#1925) 2026-10-06 11:05:40 -07:00
William LinleffffKirillshaoxiongduanClaude Opus 5.5
 		f06d824054 [feat]: add Kandinsky-6.0 TI2VA and VSR pipelines (#1924) 
Co-authored-by: leffff <levnovitskiy@gmail.com>
Co-authored-by: Kirill <kykozlov@gmail.com>
Co-authored-by: shaoxiongduan <shaoxiongduan@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-06 10:50:17 -07:00
Kyle Hu 6ded84ee0f [ci]: improve CI efficiency by reordering lanes (#1914) 2026-10-04 12:35:12 -07:00
YZJFSolitaryThinkerClaude Sonnet 5.5
 		a4d6416c52 [docs] Add OpenAI serving recipes for Wan cookbook pages (#1906) 
Co-authored-by: SolitaryThinker <wlsaidhi@gmail.com>
Co-authored-by: Claude Sonnet 5.5 <noreply@anthropic.com>
 2026-10-04 12:20:06 -07:00
lpc0220andClaude Opus 5.5 0cc41a22dc [bugfix] sm_100a VSA: fence the CLC response read before the slot release; forward PV descriptor lifetime (#1904) 
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-02 12:37:34 -07:00
William LinDavids048Claude Opus 5.5
 		8444c0897a [feat] FastH3 Ref2VA PDD inference with reference-video VSA sparsity (#1907) 
Co-authored-by: Davids048 <jundasu@ucsd.edu>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-02 11:28:07 -07:00
Kyle Hu 9491c8638a [bugfix]: keep the full audio track when saving through the ffmpeg pipe (#1910) 2026-10-01 22:22:17 -07:00
Ishan 6809a751fb [bugfix] Fixed the MiniMax-H3 pin-fallback decode test setup (#1909) 2026-10-01 22:17:46 -07:00
Kyle Huandaryan5v 8322b01815 [bugfix]: restore the NVFP4 module after test_nvfp4_config re-imports it (#1908) 
Co-authored-by: aryan5v <email.aryan1005@gmail.com>
 2026-10-01 22:17:32 -07:00
Junda Su 9edc8adf5f [misc] Move test-suite environment access into the registry and allowlists (#1898) 2026-09-30 00:15:39 -07:00
lpc0220Pengcheng LiClaude Fable 5.1
 		e1f3904799 [kernel] sm_100a CUDA backward for VSA block-sparse attention, 128-token blocks (#1866) 
Co-authored-by: Pengcheng Li <pengchengl@ptyche0203.ptyche.clusters.nvidia.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
 2026-09-29 16:57:22 -07:00
Junda Su 02f1ce11ae [misc] Move environment var reads into env registry and rename unprefixed variables (#1897) 2026-09-29 14:36:16 -07:00
Aryan KumarandAryan Kumar 7f03e03dc6 [docs]: FastH3 V2 cookbook serving and MLX install guide (#1884) 
Co-authored-by: Aryan Kumar <aryan5v@users.noreply.github.com>
 2026-09-29 13:03:18 -07:00
Junda Su e3b88bb12a [feat] Add a typed environment-variable registry, policy doc, and contract test (#1896) 2026-09-29 12:50:45 -07:00
Junda Su cb66acd400 [bugfix] Fix environment-variable bugs in LTX-2 debug logging, HF token lookup, and attention backend reads (#1895) 2026-09-29 11:48:31 -07:00