 SolitaryThinker
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d5ac1e9bee
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remove unused attention
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2025-03-14 19:31:38 +00:00 |
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SolitaryThinker
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1976b23121
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move v1's v0 code into v1/v0_reference_src
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2025-03-14 19:29:29 +00:00 |
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SolitaryThinker
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eafeea4a3f
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revert pyproject.toml
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2025-03-14 19:19:35 +00:00 |
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SolitaryThinker
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bf1fc27989
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remove unneeded file
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2025-03-14 19:17:53 +00:00 |
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William Lin
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b631546e18
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move refactor to fastvideo/v1 (#265)
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2025-03-14 19:14:54 +00:00 |
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William LinandPeiyuan Zhang
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23fd3ed3c7
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[Do not merge] V1 encoders and model loading (#261)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-03-14 19:14:54 +00:00 |
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8d99ec3c85
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V1 (#257)
Signed-off-by: <>
Co-authored-by: Will Lin <wlsaidhi@gmail.com>
Co-authored-by: Ubuntu <ubuntu@awesome-gpu-name-8-inst-2tbsnfodvpomxv4tukw2dkfgyvz.c.nv-brev-20240723.internal>
Co-authored-by: Ubuntu <ubuntu@awesome-gpu-name-9-inst-2tpydiudxfu1jg9xvpflm7oexie.c.nv-brev-20240723.internal>
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2025-03-14 19:14:54 +00:00 |
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Zhang Peiyuan
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b2def4b57c
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DiT done and plub in pipeline (#252)
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2025-03-14 19:14:54 +00:00 |
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Zhang PeiyuanandWill Lin
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6e8b11c137
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v1 staging architecture
Co-authored-by: Will Lin <wlsaidhi@gmail.com>
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2025-03-14 19:14:54 +00:00 |
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Zhang Peiyuan
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fc5a4bc236
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Refactor py (#246)
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2025-03-14 19:14:54 +00:00 |
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Zhang Peiyuan
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0f4c8d1360
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[Refactor] Add Hunyuan DiT Modeling (#241)
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2025-03-14 19:14:51 +00:00 |
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William Lin
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5252d50b25
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Initial clip encoder and cli args organization (#232)
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2025-03-14 19:07:58 +00:00 |
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William Lin
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ac07e436bb
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add sp comm (#231)
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2025-03-14 19:07:58 +00:00 |
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William Lin
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42f902cf23
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Initial set of common files and layers from vLLM (#226)
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2025-03-14 19:07:58 +00:00 |
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You Zhou
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8a77cf22c9
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Establish cicd workflow to build and publish FastVideo and STA Kernel (#227)
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2025-03-11 20:27:36 -07:00 |
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Yongqi ChenandPeiyuan Zhang
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d869d90d12
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fix training mask strategy issue (#248)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-03-05 20:00:16 -08:00 |
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Zhang Peiyuan
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554ee17de5
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[BUG] update cfg bug? (#223)
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2025-02-27 16:02:44 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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0be4fc62c9
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fix train/distill issue (#215)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-25 08:11:17 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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1e08893546
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Added multi-GPU support for Hunyuan STA (#211)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-21 14:16:28 -08:00 |
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Zhang Peiyuan
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09ab452610
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Update STA README.md (#206)
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2025-02-20 22:26:26 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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e768b5ec5b
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Update readme (#202)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-20 13:16:25 -08:00 |
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Zhang Peiyuan
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59ec42f40e
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[FIX] Make STA optinal (#204)
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2025-02-20 13:09:50 -08:00 |
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rlsu9
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5ae5b247b3
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[FIX] fix isort format (#203)
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2025-02-20 12:20:20 -08:00 |
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ead6c62be4
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[Feat] Add STA for StepVideo (#200)
Co-authored-by: rlsu9 <r3su@ucsd.edu>
Co-authored-by: BrianChen1129 <yongqich@umich.edu>
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2025-02-20 11:33:58 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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6805eaa06c
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[bug]: fix ori hunyuan inference issue (#199)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-19 14:18:15 -08:00 |
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Zhang Peiyuan
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c39a15551c
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Update typo (#198)
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2025-02-18 19:34:45 -08:00 |
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Zhang Peiyuan
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e6dda263b0
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Update Cite (#195)
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2025-02-18 21:01:46 -05:00 |
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Zhang Peiyuan
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f9482d113c
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update env (#194)
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2025-02-18 20:45:08 -05:00 |
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rlsu9
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a3ec969397
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[feat]: fix readme demo and add video to readme (#191)
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2025-02-18 17:46:32 -05:00 |
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Yongqi ChenandPeiyuan Zhang
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76a12cc8a1
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Infer sta tea with torch.compile (#190)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-18 11:29:36 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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ac490399c6
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fix kernel issue (#185)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-16 21:35:56 -08:00 |
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Yongqi ChenandPeiyuan Zhang
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9ea39cee57
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Add STA and teacache forward (#184)
Co-authored-by: Peiyuan Zhang <a1286225768@gmail.com>
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2025-02-15 16:22:01 -08:00 |
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Zhang Peiyuanandrlsu9
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52e6e612a2
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add sliding tile attn (#182)
Co-authored-by: rlsu9 <r3su@ucsd.edu>
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2025-02-15 15:44:34 -08:00 |
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Hangliang Ding
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9aebc4ada1
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Create config.yml (#152)
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2025-01-20 20:11:01 -08:00 |
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Yongqi Chen
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b53cf7425c
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Lora README update (#155)
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2025-01-18 12:30:53 -08:00 |
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Zhang Peiyuan
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d9ce056901
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[typo]
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2025-01-13 20:05:57 -08:00 |
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Brian Chen
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218449c54d
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adding hunyuan hf (support lora finetuning); unified hunyuan hf inference with quantization (#135)
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2025-01-13 19:47:42 -08:00 |
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Hangliang Ding
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221958bcde
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Update README.md (#131)
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2025-01-08 09:02:40 -08:00 |
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Yuzhou Nieand“Peiyuan Zhang”
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4a1f1e35bb
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add parallel for vae decoding (#134)
Co-authored-by: “Peiyuan Zhang” <a1286225768@gmail.com>
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2025-01-07 17:14:21 -08:00 |
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rlsu9
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e0e05f97f2
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[feat]: Add tests for FastVideo (#127)
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2025-01-06 12:27:39 -08:00 |
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Zhang Peiyuan
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dd75ee8509
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[Fix] Save CK, Dataset bug fix (#125)
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2024-12-31 22:19:10 -08:00 |
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rlsu9
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0aed1868df
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[feat]: Add format auto fixer to main branch (#124)
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2024-12-31 15:23:17 -08:00 |
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Hangliang Ding
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d467c7cd35
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[Minor] Adding issue template. (#114)
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2024-12-25 21:50:57 -08:00 |
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Zhang Peiyuanandrlsu9
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88b2583c2c
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[feat]:Single 4090 inference for fasthunyuan (#104)
Co-authored-by: rlsu9 <r3su@ucsd.edu>
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2024-12-25 12:40:16 -08:00 |
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rlsu9
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a730e43d5f
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Update README.md layout
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2024-12-19 13:36:43 -08:00 |
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Brian Chen
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edf116fa46
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fix lora checkpoint saving issue (#97)
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2024-12-19 08:42:59 -08:00 |
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Luis Catacora
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de3cefb5e5
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Add Replicate demo and API (#93)
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2024-12-18 19:56:09 -08:00 |
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Hangliang Ding
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e087e85e09
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Adding Development plan
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2024-12-18 16:46:14 +08:00 |
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Your Name
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e1b998b6ef
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merge
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2024-12-17 12:48:16 -08:00 |
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rlsu9
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fb49c93dbc
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Update README.md
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2024-12-17 12:29:03 -08:00 |
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