iGavroche
c989a48aab
- LTX Video VAE detection (128 channels, 32x spatial compression, 8x temporal) - z-image / z-image-turbo pixel-space VAE passthrough (no decode needed) - fp16 default on all AMD GPUs (Strix Halo, RDNA 2/3, CDNA) - Per-architecture tuning with automatic detection (gfx1151/gfx1100/gfx1030/CDNA) - Temporal tiling for long videos: overlapping chunks with linear blend, zero frame loss, progress bar in UI (disabled by default) - Chunked IO bypass for LTX — fixes OOM with max_split_size_mb caps - Fixed memory estimation: correct for all dims (including 5D temporal) and dtypes - APU-aware memory management (psutil for unified memory on Strix Halo) - Tile size floor for high-compression VAEs (min 64 latent pixels) - 25 unit tests covering all new features
103 lines
2.6 KiB
Python
103 lines
2.6 KiB
Python
"""
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Constants and configuration for ROCM Ninodes.
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Shared constants used across the package, including:
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- Default tile sizes
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- Memory configuration
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- Architecture-specific settings
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"""
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# Default tile sizes for VAE operations
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DEFAULT_TILE_SIZE = 768
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MIN_TILE_SIZE = 256
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MAX_TILE_SIZE = 2048
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DEFAULT_TILE_OVERLAP = 96
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MIN_LATENT_TILE_SIZE = 64
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MIN_LATENT_OVERLAP = 4
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# Memory configuration
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DEFAULT_MEMORY_SAFETY_GB = 2.0
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MEMORY_MULTIPLIER_FP32 = 1.5
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MEMORY_MULTIPLIER_FP8 = 0.5
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MEMORY_MULTIPLIER_INT8 = 0.25
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MEMORY_MULTIPLIER_INT4 = 0.25
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# Architecture-specific settings
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# gfx1151 (Strix Halo) — APU with unified memory
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GFX1151_TILE_SIZE_RANGE = (768, 2048)
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GFX1151_PREFERRED_PRECISION = "fp16"
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GFX1151_BATCH_CAP = 8
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GFX1151_IS_APU = True
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# gfx1100-1102 (RDNA 3 — discrete)
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GFX1100_TILE_SIZE_RANGE = (768, 2048)
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GFX1100_PREFERRED_PRECISION = "fp16"
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GFX1100_BATCH_CAP = 16
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GFX1100_IS_APU = False
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# gfx1030-1032 (RDNA 2 — discrete)
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GFX1030_TILE_SIZE_RANGE = (512, 1536)
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GFX1030_PREFERRED_PRECISION = "fp16"
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GFX1030_BATCH_CAP = 8
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GFX1030_IS_APU = False
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# gfx90a, gfx942 (CDNA — discrete)
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CDNA_TILE_SIZE_RANGE = (768, 2048)
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CDNA_PREFERRED_PRECISION = "bf16"
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CDNA_BATCH_CAP = 32
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CDNA_IS_APU = False
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# Default fallback for unknown AMD architectures
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DEFAULT_AMD_TILE_SIZE_RANGE = (512, 1024)
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DEFAULT_AMD_PREFERRED_PRECISION = "fp16"
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DEFAULT_AMD_BATCH_CAP = 4
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DEFAULT_AMD_IS_APU = False
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# Quantization detection
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QUANTIZATION_TYPES = ["fp8", "int8", "int4", "bf16", "fp32"]
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# Performance targets
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FLUX_TARGET_TIME_SECONDS = 110
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WAN_TARGET_TIME_SECONDS = 93
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VAE_DECODE_TARGET_SECONDS = 10
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CHECKPOINT_LOAD_TARGET_SECONDS = 30
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__all__ = [
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'DEFAULT_TILE_SIZE',
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'MIN_TILE_SIZE',
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'MAX_TILE_SIZE',
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'DEFAULT_TILE_OVERLAP',
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'MIN_LATENT_TILE_SIZE',
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'MIN_LATENT_OVERLAP',
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'DEFAULT_MEMORY_SAFETY_GB',
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'MEMORY_MULTIPLIER_FP32',
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'MEMORY_MULTIPLIER_FP8',
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'MEMORY_MULTIPLIER_INT8',
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'MEMORY_MULTIPLIER_INT4',
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'GFX1151_TILE_SIZE_RANGE',
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'GFX1151_PREFERRED_PRECISION',
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'GFX1151_BATCH_CAP',
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'GFX1151_IS_APU',
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'GFX1100_TILE_SIZE_RANGE',
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'GFX1100_PREFERRED_PRECISION',
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'GFX1100_BATCH_CAP',
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'GFX1100_IS_APU',
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'GFX1030_TILE_SIZE_RANGE',
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'GFX1030_PREFERRED_PRECISION',
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'GFX1030_BATCH_CAP',
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'GFX1030_IS_APU',
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'CDNA_TILE_SIZE_RANGE',
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'CDNA_PREFERRED_PRECISION',
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'CDNA_BATCH_CAP',
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'CDNA_IS_APU',
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'DEFAULT_AMD_TILE_SIZE_RANGE',
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'DEFAULT_AMD_PREFERRED_PRECISION',
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'DEFAULT_AMD_BATCH_CAP',
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'DEFAULT_AMD_IS_APU',
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'QUANTIZATION_TYPES',
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'FLUX_TARGET_TIME_SECONDS',
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'WAN_TARGET_TIME_SECONDS',
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'VAE_DECODE_TARGET_SECONDS',
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'CHECKPOINT_LOAD_TARGET_SECONDS',
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]
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